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[src/trunk]: src/gnu/dist/toolchain/gdb Apply Richard Earnshaw's gdb.step.pat...
details: https://anonhg.NetBSD.org/src/rev/a5688e29e5a4
branches: trunk
changeset: 516394:a5688e29e5a4
user: bjh21 <bjh21%NetBSD.org@localhost>
date: Mon Oct 22 18:58:50 2001 +0000
description:
Apply Richard Earnshaw's gdb.step.patch, which adds software single-step
support to GDB ARM targets in general, and make corresponding changes to
NetBSD-specific code.
The first half of this has already been send to gdb-patches by Richard.
The second half is irrelevant to them since they don't yet have NetBSD/arm
support in their tree yet.
diffstat:
gnu/dist/toolchain/gdb/arm-tdep.c | 28 ++++++++++++++++++
gnu/dist/toolchain/gdb/armnbsd-nat.c | 45 -----------------------------
gnu/dist/toolchain/gdb/config/arm/tm-arm.h | 16 ++++++++-
gnu/dist/toolchain/gdb/config/arm/tm-nbsd.h | 5 ---
4 files changed, 41 insertions(+), 53 deletions(-)
diffs (146 lines):
diff -r dd74641df13d -r a5688e29e5a4 gnu/dist/toolchain/gdb/arm-tdep.c
--- a/gnu/dist/toolchain/gdb/arm-tdep.c Mon Oct 22 18:11:43 2001 +0000
+++ b/gnu/dist/toolchain/gdb/arm-tdep.c Mon Oct 22 18:58:50 2001 +0000
@@ -1487,6 +1487,8 @@
return 1;
}
+#if SOFTWARE_SINGLE_STEP_P
+/* Support routines for single stepping. Calculate the next PC value. */
#define submask(x) ((1L << ((x) + 1)) - 1)
#define bit(obj,st) (((obj) >> (st)) & 1)
#define bits(obj,st,fn) (((obj) >> (st)) & submask ((fn) - (st)))
@@ -1821,6 +1823,32 @@
return nextpc;
}
+/* single_step() is called just before we want to resume the inferior,
+ if we want to single-step it but there is no hardware or kernel
+ single-step support. We find the target of the coming instruction
+ and breakpoint it.
+
+ single_step is also called just after the inferior stops. If we had
+ set up a simulated single-step, we undo our damage. */
+
+void
+arm_software_single_step (ignore, insert_bpt)
+ int ignore; /* Signal, not needed */
+ int insert_bpt;
+{
+ static int next_pc; /* State between setting and unsetting. */
+ static char break_mem[BREAKPOINT_MAX]; /* Temporary storage for mem@bpt */
+
+ if (insert_bpt)
+ {
+ next_pc = arm_get_next_pc (read_register (PC_REGNUM));
+ target_insert_breakpoint (next_pc, break_mem);
+ }
+ else
+ target_remove_breakpoint (next_pc, break_mem);
+}
+#endif /* SOFTWARE_SINGLE_STEP_P */
+
#include "bfd-in2.h"
#include "libcoff.h"
diff -r dd74641df13d -r a5688e29e5a4 gnu/dist/toolchain/gdb/armnbsd-nat.c
--- a/gnu/dist/toolchain/gdb/armnbsd-nat.c Mon Oct 22 18:11:43 2001 +0000
+++ b/gnu/dist/toolchain/gdb/armnbsd-nat.c Mon Oct 22 18:58:50 2001 +0000
@@ -116,51 +116,6 @@
add_core_fns (&netbsd_core_fns);
}
-/* Single stepping support */
-
-static char breakpoint_shadow[BREAKPOINT_MAX];
-static CORE_ADDR next_pc;
-
-/* single_step() is called just before we want to resume the inferior,
- * if we want to single-step it but there is no hardware or kernel
- * single-step support. We find all the possible targets of the
- * coming instruction and breakpoint them.
- *
- * single_step is also called just after the inferior stops. If we had
- * set up a simulated single-step, we undo our damage.
- */
-
-void
-arm_single_step (ignore, insert_breakpoints_p)
- unsigned int ignore; /* signal, but we don't need it */
- int insert_breakpoints_p;
-{
- CORE_ADDR arm_pc;
-
- if (insert_breakpoints_p)
- {
- /*
- * Ok arm_pc is the address of the instruction will will run
- * when we resume.
- * Analyse the instruction at this address to work out the
- * address of the next instruction.
- */
-
- arm_pc = read_register(PC_REGNUM);
- next_pc = arm_get_next_pc(arm_pc);
-
- target_insert_breakpoint(next_pc, breakpoint_shadow);
-/* printf_unfiltered("pc=%x: set break at %x\n", arm_pc, next_pc);*/
-
- return;
- }
- else
- {
- /* Remove breakpoints */
- target_remove_breakpoint(next_pc, breakpoint_shadow);
- }
-}
-
/*
* Temporary routine to warn folks this code is still experimental
*/
diff -r dd74641df13d -r a5688e29e5a4 gnu/dist/toolchain/gdb/config/arm/tm-arm.h
--- a/gnu/dist/toolchain/gdb/config/arm/tm-arm.h Mon Oct 22 18:11:43 2001 +0000
+++ b/gnu/dist/toolchain/gdb/config/arm/tm-arm.h Mon Oct 22 18:58:50 2001 +0000
@@ -92,9 +92,9 @@
Even this may only true if the condition predicate is true. The
following use a condition predicate of ALWAYS so it is always TRUE.
- There are other ways of forcing a breakpoint. ARM Linux, RisciX,
- and I suspect NetBSD will all use a software interrupt rather than
- an undefined instruction to force a trap. This can be handled by
+ There are other ways of forcing a breakpoint. ARM Linux, RISC iX,
+ and NetBSD will all use a software interrupt rather than an
+ undefined instruction to force a trap. This can be handled by
redefining some or all of the following in a target dependent
fashion. */
@@ -471,6 +471,16 @@
int nargs, struct value ** args,
struct type * type, int gcc_p);
+/* Most ARMs don't have single stepping capability, so provide a
+ single-stepping mechanism by default */
+#ifndef SOFTWARE_SINGLE_STEP_P
+#define SOFTWARE_SINGLE_STEP_P 1
+#endif
+#if SOFTWARE_SINGLE_STEP_P
+#define SOFTWARE_SINGLE_STEP(sig,bpt) arm_software_single_step((sig), (bpt))
+void arm_software_single_step PARAMS((int, int));
+#endif
+
CORE_ADDR arm_get_next_pc (CORE_ADDR pc);
/* Macros for setting and testing a bit in a minimal symbol that marks
diff -r dd74641df13d -r a5688e29e5a4 gnu/dist/toolchain/gdb/config/arm/tm-nbsd.h
--- a/gnu/dist/toolchain/gdb/config/arm/tm-nbsd.h Mon Oct 22 18:11:43 2001 +0000
+++ b/gnu/dist/toolchain/gdb/config/arm/tm-nbsd.h Mon Oct 22 18:58:50 2001 +0000
@@ -49,9 +49,4 @@
#define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR)
-#undef SOFTWARE_SINGLE_STEP_P
-#define SOFTWARE_SINGLE_STEP_P 1
-void arm_single_step PARAMS ((unsigned int, int));
-#define SOFTWARE_SINGLE_STEP(sig, bp_p) arm_single_step(sig, bp_p)
-
#endif /* TM_NBSD_H */
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