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[src/trunk]: src/sys/arch/arm/arm32 Move these from arm32/arm32
details: https://anonhg.NetBSD.org/src/rev/726b3afcf388
branches: trunk
changeset: 504494:726b3afcf388
user: matt <matt%NetBSD.org@localhost>
date: Sun Mar 04 05:11:41 2001 +0000
description:
Move these from arm32/arm32
diffstat:
sys/arch/arm/arm32/db_interface.c | 472 ++++++++++++++++++++++++++++++++++++++
sys/arch/arm/arm32/db_machdep.c | 211 ++++++++++++++++
sys/arch/arm/arm32/db_trace.c | 149 +++++++++++
3 files changed, 832 insertions(+), 0 deletions(-)
diffs (truncated from 844 to 300 lines):
diff -r 0705119103de -r 726b3afcf388 sys/arch/arm/arm32/db_interface.c
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/arm/arm32/db_interface.c Sun Mar 04 05:11:41 2001 +0000
@@ -0,0 +1,472 @@
+/* $NetBSD: db_interface.c,v 1.1 2001/03/04 05:11:41 matt Exp $ */
+
+/*
+ * Copyright (c) 1996 Scott K. Stevens
+ *
+ * Mach Operating System
+ * Copyright (c) 1991,1990 Carnegie Mellon University
+ * All Rights Reserved.
+ *
+ * Permission to use, copy, modify and distribute this software and its
+ * documentation is hereby granted, provided that both the copyright
+ * notice and this permission notice appear in all copies of the
+ * software, derivative works or modified versions, and any portions
+ * thereof, and that both notices appear in supporting documentation.
+ *
+ * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
+ * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
+ * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
+ *
+ * Carnegie Mellon requests users of this software to return to
+ *
+ * Software Distribution Coordinator or Software.Distribution%CS.CMU.EDU@localhost
+ * School of Computer Science
+ * Carnegie Mellon University
+ * Pittsburgh PA 15213-3890
+ *
+ * any improvements or extensions that they make and grant Carnegie the
+ * rights to redistribute these changes.
+ *
+ * From: db_interface.c,v 2.4 1991/02/05 17:11:13 mrt (CMU)
+ */
+
+/*
+ * Interface to new debugger.
+ */
+#include "opt_ddb.h"
+
+#include <sys/param.h>
+#include <sys/proc.h>
+#include <sys/reboot.h>
+#include <sys/systm.h> /* just for boothowto */
+#include <sys/exec.h>
+
+#include <uvm/uvm_extern.h>
+
+#include <machine/db_machdep.h>
+#include <machine/katelib.h>
+#include <machine/pte.h>
+#include <machine/undefined.h>
+#include <ddb/db_command.h>
+#include <ddb/db_output.h>
+#include <ddb/db_variables.h>
+#include <ddb/db_sym.h>
+#include <ddb/db_extern.h>
+#include <ddb/db_interface.h>
+#include <dev/cons.h>
+
+static int nil;
+
+int db_access_und_sp __P((const struct db_variable *, db_expr_t *, int));
+int db_access_abt_sp __P((const struct db_variable *, db_expr_t *, int));
+int db_access_irq_sp __P((const struct db_variable *, db_expr_t *, int));
+u_int db_fetch_reg __P((int, db_regs_t *));
+
+const struct db_variable db_regs[] = {
+ { "spsr", (long *)&DDB_REGS->tf_spsr, FCN_NULL, },
+ { "r0", (long *)&DDB_REGS->tf_r0, FCN_NULL, },
+ { "r1", (long *)&DDB_REGS->tf_r1, FCN_NULL, },
+ { "r2", (long *)&DDB_REGS->tf_r2, FCN_NULL, },
+ { "r3", (long *)&DDB_REGS->tf_r3, FCN_NULL, },
+ { "r4", (long *)&DDB_REGS->tf_r4, FCN_NULL, },
+ { "r5", (long *)&DDB_REGS->tf_r5, FCN_NULL, },
+ { "r6", (long *)&DDB_REGS->tf_r6, FCN_NULL, },
+ { "r7", (long *)&DDB_REGS->tf_r7, FCN_NULL, },
+ { "r8", (long *)&DDB_REGS->tf_r8, FCN_NULL, },
+ { "r9", (long *)&DDB_REGS->tf_r9, FCN_NULL, },
+ { "r10", (long *)&DDB_REGS->tf_r10, FCN_NULL, },
+ { "r11", (long *)&DDB_REGS->tf_r11, FCN_NULL, },
+ { "r12", (long *)&DDB_REGS->tf_r12, FCN_NULL, },
+ { "usr_sp", (long *)&DDB_REGS->tf_usr_sp, FCN_NULL, },
+ { "usr_lr", (long *)&DDB_REGS->tf_usr_lr, FCN_NULL, },
+ { "svc_sp", (long *)&DDB_REGS->tf_svc_sp, FCN_NULL, },
+ { "svc_lr", (long *)&DDB_REGS->tf_svc_lr, FCN_NULL, },
+ { "pc", (long *)&DDB_REGS->tf_pc, FCN_NULL, },
+ { "und_sp", (long *)&nil, db_access_und_sp, },
+ { "abt_sp", (long *)&nil, db_access_abt_sp, },
+ { "irq_sp", (long *)&nil, db_access_irq_sp, },
+};
+
+const struct db_variable * const db_eregs = db_regs + sizeof(db_regs)/sizeof(db_regs[0]);
+
+extern label_t *db_recover;
+
+int db_active = 0;
+
+int db_access_und_sp(vp, valp, rw)
+ const struct db_variable *vp;
+ db_expr_t *valp;
+ int rw;
+{
+ if (rw == DB_VAR_GET)
+ *valp = get_stackptr(PSR_UND32_MODE);
+ return(0);
+}
+
+int db_access_abt_sp(vp, valp, rw)
+ const struct db_variable *vp;
+ db_expr_t *valp;
+ int rw;
+{
+ if (rw == DB_VAR_GET)
+ *valp = get_stackptr(PSR_ABT32_MODE);
+ return(0);
+}
+
+int db_access_irq_sp(vp, valp, rw)
+ const struct db_variable *vp;
+ db_expr_t *valp;
+ int rw;
+{
+ if (rw == DB_VAR_GET)
+ *valp = get_stackptr(PSR_IRQ32_MODE);
+ return(0);
+}
+
+/*
+ * kdb_trap - field a TRACE or BPT trap
+ */
+int
+kdb_trap(type, regs)
+ int type;
+ db_regs_t *regs;
+{
+ int s;
+
+ switch (type) {
+ case T_BREAKPOINT: /* breakpoint */
+ case -1: /* keyboard interrupt */
+ break;
+ default:
+ db_printf("kernel: trap");
+ if (db_recover != 0) {
+ db_error("Faulted in DDB; continuing...\n");
+ /*NOTREACHED*/
+ }
+ }
+
+ /* Should switch to kdb`s own stack here. */
+
+ ddb_regs = *regs;
+
+ s = splhigh();
+ db_active++;
+ cnpollc(TRUE);
+ db_trap(type, 0/*code*/);
+ cnpollc(FALSE);
+ db_active--;
+ splx(s);
+
+ *regs = ddb_regs;
+
+ return (1);
+}
+
+
+/*
+ * Received keyboard interrupt sequence.
+ */
+void
+kdb_kbd_trap(regs)
+ db_regs_t *regs;
+{
+ if (db_active == 0 && (boothowto & RB_KDB)) {
+ printf("\n\nkernel: keyboard interrupt\n");
+ kdb_trap(-1, regs);
+ }
+}
+
+
+static int
+db_validate_address(addr)
+ vm_offset_t addr;
+{
+ pt_entry_t *ptep;
+ pd_entry_t *pdep;
+ struct proc *p = curproc;
+
+ /*
+ * If we have a valid pmap for curproc, use it's page directory
+ * otherwise use the kernel pmap's page directory.
+ */
+ if (!p || !p->p_vmspace || !p->p_vmspace->vm_map.pmap)
+ pdep = kernel_pmap->pm_pdir;
+ else
+ pdep = p->p_vmspace->vm_map.pmap->pm_pdir;
+
+ /* Make sure the address we are reading is valid */
+ switch ((pdep[(addr >> 20) + 0] & L1_MASK)) {
+ case L1_SECTION:
+ break;
+ case L1_PAGE:
+ /* Check the L2 page table for validity */
+ ptep = vtopte(addr);
+ if ((*ptep & L2_MASK) != L2_INVAL)
+ break;
+ /* FALLTHROUGH */
+ default:
+ return 1;
+ }
+
+ return 0;
+}
+
+/*
+ * Read bytes from kernel address space for debugger.
+ */
+void
+db_read_bytes(addr, size, data)
+ vm_offset_t addr;
+ int size;
+ char *data;
+{
+ char *src;
+
+ src = (char *)addr;
+ while (--size >= 0) {
+ if (db_validate_address((u_int)src)) {
+ db_printf("address %p is invalid\n", src);
+ return;
+ }
+ *data++ = *src++;
+ }
+}
+
+static void
+db_write_text(dst, ch)
+ unsigned char *dst;
+ int ch;
+{
+ pt_entry_t *ptep, pteo;
+ vm_offset_t va;
+
+ va = (unsigned long)dst & (~PGOFSET);
+ ptep = vtopte(va);
+
+ if (db_validate_address((u_int)dst)) {
+ db_printf(" address %p not a valid page\n", dst);
+ return;
+ }
+
+ pteo = *ptep;
+ *ptep = pteo | PT_AP(AP_KRW);
+ cpu_tlb_flushD_SE(va);
+
+ *dst = (unsigned char)ch;
+
+ /* make sure the caches and memory are in sync */
+ cpu_cache_syncI_rng((u_int)dst, 4);
+
+ *ptep = pteo;
+ cpu_tlb_flushD_SE(va);
+}
+
+/*
+ * Write bytes to kernel address space for debugger.
+ */
+void
+db_write_bytes(addr, size, data)
+ vm_offset_t addr;
+ int size;
+ char *data;
+{
+ extern char etext[];
+ char *dst;
+ int loop;
+
+ dst = (char *)addr;
+ loop = size;
+ while (--loop >= 0) {
+ if ((dst >= (char *)KERNEL_TEXT_BASE) && (dst < etext))
+ db_write_text(dst, *data);
+ else {
+ if (db_validate_address((u_int)dst)) {
+ db_printf("address %p is invalid\n", dst);
+ return;
+ }
+ *dst = *data;
+ }
+ dst++, data++;
+ }
+ /* make sure the caches and memory are in sync */
+ cpu_cache_syncI_rng(addr, size);
+
+ /* In case the current page tables have been modified ... */
+ cpu_tlb_flushID();
+}
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