Source-Changes-HG archive

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]

[src/trunk]: src/sys/arch/arm/arm32 Move these from arm32/arm32



details:   https://anonhg.NetBSD.org/src/rev/1234661c70d8
branches:  trunk
changeset: 504492:1234661c70d8
user:      matt <matt%NetBSD.org@localhost>
date:      Sun Mar 04 05:08:43 2001 +0000

description:
Move these from arm32/arm32

diffstat:

 sys/arch/arm/arm32/sys_machdep.c |  114 +++++++++++++++
 sys/arch/arm/arm32/syscall.c     |  295 +++++++++++++++++++++++++++++++++++++++
 2 files changed, 409 insertions(+), 0 deletions(-)

diffs (truncated from 417 to 300 lines):

diff -r 79c4791794aa -r 1234661c70d8 sys/arch/arm/arm32/sys_machdep.c
--- /dev/null   Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/arm/arm32/sys_machdep.c  Sun Mar 04 05:08:43 2001 +0000
@@ -0,0 +1,114 @@
+/*     $NetBSD: sys_machdep.c,v 1.1 2001/03/04 05:08:43 matt Exp $     */
+
+/*
+ * Copyright (c) 1995-1997 Mark Brinicombe.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *     This product includes software developed by Mark Brinicombe
+ * 4. The name of the company nor the name of the author may be used to
+ *    endorse or promote products derived from this software without specific
+ *    prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * RiscBSD kernel project
+ *
+ * sys_machdep.c
+ *
+ * Machine dependant syscalls
+ *
+ * Created      : 10/01/96
+ */
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/proc.h>
+#include <sys/mbuf.h>
+#include <sys/mount.h>
+#include <uvm/uvm_extern.h>
+#include <sys/sysctl.h>
+#include <sys/syscallargs.h>
+
+#include <machine/sysarch.h>
+
+static int
+arm32_sync_icache(p, args, retval)
+       struct proc *p;
+       char *args;
+       register_t *retval;
+{
+       struct arm32_sync_icache_args ua;
+       int error;
+
+       if ((error = copyin(args, &ua, sizeof(ua))) != 0)
+               return (error);
+
+       cpu_cache_syncI_rng(ua.addr, ua.len);
+
+       *retval = 0;
+       return(0);
+}
+
+static int
+arm32_drain_writebuf(p, args, retval)
+       struct proc *p;
+       char *args;
+       register_t *retval;
+{
+       /* No args. */
+
+       cpu_drain_writebuf();
+
+       *retval = 0;
+       return(0);
+}
+
+int
+sys_sysarch(p, v, retval)
+       struct proc *p;
+       void *v;
+       register_t *retval;
+{
+       struct sys_sysarch_args /* {
+               syscallarg(int) op;
+               syscallarg(void *) parms;
+       } */ *uap = v;
+       int error = 0;
+
+       switch(SCARG(uap, op)) {
+       case ARM32_SYNC_ICACHE : 
+               error = arm32_sync_icache(p, SCARG(uap, parms), retval);
+               break;
+
+       case ARM32_DRAIN_WRITEBUF : 
+               error = arm32_drain_writebuf(p, SCARG(uap, parms), retval);
+               break;
+
+       default:
+               error = EINVAL;
+               break;
+       }
+       return (error);
+}
+  
+/* End of sys_machdep.c */
diff -r 79c4791794aa -r 1234661c70d8 sys/arch/arm/arm32/syscall.c
--- /dev/null   Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/arm/arm32/syscall.c      Sun Mar 04 05:08:43 2001 +0000
@@ -0,0 +1,295 @@
+/*     $NetBSD: syscall.c,v 1.1 2001/03/04 05:08:43 matt Exp $ */
+
+/*-
+ * Copyright (c) 2000 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Charles M. Hannum.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *        This product includes software developed by the NetBSD
+ *        Foundation, Inc. and its contributors.
+ * 4. Neither the name of The NetBSD Foundation nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Copyright (c) 1994-1998 Mark Brinicombe.
+ * Copyright (c) 1994 Brini.
+ * All rights reserved.
+ *
+ * This code is derived from software written for Brini by Mark Brinicombe
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *     This product includes software developed by Mark Brinicombe
+ *     for the NetBSD Project.
+ * 4. The name of the company nor the name of the author may be used to
+ *    endorse or promote products derived from this software without specific
+ *    prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * syscall entry handling
+ *
+ * Created      : 09/11/94
+ */
+
+#include "opt_ktrace.h"
+#include "opt_syscall_debug.h"
+
+#include <sys/param.h>
+#include <sys/errno.h>
+#include <sys/signalvar.h>
+#include <sys/systm.h>
+#include <sys/reboot.h>
+#include <sys/syscall.h>
+#include <sys/user.h>
+#ifdef KTRACE
+#include <sys/ktrace.h>
+#endif
+
+#include <uvm/uvm_extern.h>
+
+#include <machine/cpu.h>
+#include <machine/frame.h>
+#include <machine/katelib.h>
+#include <machine/pcb.h>
+
+u_int arm700bugcount = 0;
+
+/*
+ * syscall(frame):
+ *
+ * System call request from POSIX system call gate interface to kernel.
+ */
+void
+syscall(frame, code)
+       trapframe_t *frame;
+       int code;
+{
+       caddr_t stackargs;
+       const struct sysent *callp;
+       struct proc *p;
+       int error;
+       u_int argsize;
+       int *args, copyargs[8], rval[2];
+       int regparams;
+
+       /*
+        * Enable interrupts if they were enabled before the exception.
+        * Since all syscalls *should* come from user mode it will always
+        * be safe to enable them, but check anyway. 
+        */
+       if (!(frame->tf_spsr & I32_bit))
+               enable_interrupts(I32_bit);
+
+#ifdef DEBUG
+       if ((GetCPSR() & PSR_MODE) != PSR_SVC32_MODE)
+               panic("syscall: not in SVC32 mode");
+#endif /* DEBUG */
+
+       uvmexp.syscalls++;
+       p = curproc;
+       p->p_addr->u_pcb.pcb_tf = frame;
+
+#ifdef CPU_ARM7
+       /*
+        * This code is only needed if we are including support for the ARM7
+        * core. Other CPUs do not need it but it does not hurt.
+        */
+
+       /*
+        * ARM700/ARM710 match sticks and sellotape job ...
+        *
+        * I know this affects GPS/VLSI ARM700/ARM710 + various ARM7500.
+        *
+        * On occasion data aborts are mishandled and end up calling
+        * the swi vector.
+        *
+        * If the instruction that caused the exception is not a SWI
+        * then we hit the bug.
+        */
+       if ((ReadWord(frame->tf_pc - INSN_SIZE) & 0x0f000000) != 0x0f000000) {
+               frame->tf_pc -= INSN_SIZE;
+               ++arm700bugcount;
+               userret(p);
+               return;
+       }
+#endif /* CPU_ARM7 */
+
+       /*
+        * Support for architecture dependant SWIs
+        */
+       if (code & 0x00f00000) {
+               /*
+                * Support for the Architecture defined SWI's in case the
+                * processor does not support them.
+                */
+               switch (code) {
+               case 0x00f00000 :       /* IMB */
+               case 0x00f00001 :       /* IMB_range */
+                       /*
+                        * Do nothing as there is no prefetch unit that needs
+                        * flushing
+                        */
+                       break;
+               default:



Home | Main Index | Thread Index | Old Index