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[src/trunk]: src/common/lib/libc/arch x86: Omit needless store in membar_prod...
details: https://anonhg.NetBSD.org/src/rev/5b71fbbddd34
branches: trunk
changeset: 364727:5b71fbbddd34
user: riastradh <riastradh%NetBSD.org@localhost>
date: Sat Apr 09 12:07:17 2022 +0000
description:
x86: Omit needless store in membar_producer/exit.
On x86, every store is a store-release, so there is no need for any
barrier. But this wasn't a barrier anyway; it was just a store,
which was redundant with the store of the return address to the stack
implied by CALL even if issuing a store made a difference.
diffstat:
common/lib/libc/arch/i386/atomic/atomic.S | 9 ++++++---
common/lib/libc/arch/x86_64/atomic/atomic.S | 9 ++++++---
2 files changed, 12 insertions(+), 6 deletions(-)
diffs (46 lines):
diff -r 1fcb11c0680d -r 5b71fbbddd34 common/lib/libc/arch/i386/atomic/atomic.S
--- a/common/lib/libc/arch/i386/atomic/atomic.S Sat Apr 09 12:07:00 2022 +0000
+++ b/common/lib/libc/arch/i386/atomic/atomic.S Sat Apr 09 12:07:17 2022 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: atomic.S,v 1.31 2022/04/09 12:07:00 riastradh Exp $ */
+/* $NetBSD: atomic.S,v 1.32 2022/04/09 12:07:17 riastradh Exp $ */
/*-
* Copyright (c) 2007 The NetBSD Foundation, Inc.
@@ -188,8 +188,11 @@
END(_membar_consumer)
ENTRY(_membar_producer)
- /* A store is enough */
- movl $0, -4(%esp)
+ /*
+ * Every store to normal memory is a store-release on x86, so
+ * there is never any need for explicit barriers to order
+ * anything-before-store.
+ */
ret
END(_membar_producer)
diff -r 1fcb11c0680d -r 5b71fbbddd34 common/lib/libc/arch/x86_64/atomic/atomic.S
--- a/common/lib/libc/arch/x86_64/atomic/atomic.S Sat Apr 09 12:07:00 2022 +0000
+++ b/common/lib/libc/arch/x86_64/atomic/atomic.S Sat Apr 09 12:07:17 2022 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: atomic.S,v 1.24 2022/04/09 12:07:00 riastradh Exp $ */
+/* $NetBSD: atomic.S,v 1.25 2022/04/09 12:07:17 riastradh Exp $ */
/*-
* Copyright (c) 2007 The NetBSD Foundation, Inc.
@@ -263,8 +263,11 @@
END(_membar_consumer)
ENTRY(_membar_producer)
- /* A store is enough */
- movq $0, -8(%rsp)
+ /*
+ * Every store to normal memory is a store-release on x86, so
+ * there is never any need for explicit barriers to order
+ * anything-before-store.
+ */
ret
END(_membar_producer)
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