Re: SmartFirmware interrupts

[Frank Wille <frank%phoenix.owl.de@localhost>]

Matt Sealey wrote:

> > How does an address of 0xf1000cb4 help me now? Is it the memory-mapped
> > base address of the first PIC? But where are the registers for the second
> > one? 0x80 bytes from there?
>
> Usually. One thing you can assume is that everything on the PCI bus is 
> mapped to IRQ 9 anyway - because, it really is.

Er... you didn't reply to my question? AFAIK a 8259 has two
8-bit registers. Where would I find them? Especially from the
second, cascaded 8259?

But interesting to know the IRQ. So we will hardcode this into
the kernel? :P

And is it really desirable that all PCI devices have to share
the same interrupt?


> Everything else, you can assume a
> standard PCI interrupt number (14/15 for IDE) as these are handled by 
> the ISA bridge and trapped and transparently routed to IRQ 9.

This means that IRQ14 and 15, and some others, are never
used on the 8259? Anything shares IRQ 9?


> I am fairly sure Pegasos includes the interrupt numbers (do you have the
> latest firmware 1.2?)

Yes. I got 1.2 after I received a replacement board (first
one was dead after 2 years, and it had the previous release).


> because Linux patches them.  The IDE controller has
> 0x14 and 0x15 instead of decimal 14 and 15, for example..

Hmm... but it is irrelevant, because IDE uses IRQ 9 anyway?
So I don't understand the effort.


> it is not a
> proper, full interrupt-map but it certain is more than enough to get the
> system up

Tell me where to find the interrupts for IDE or USB in the
device tree of 1.2. Exact path and property name. Seems I'm
not the only one who is too blind... :|


--
Frank Wille